When head-in-pillow or solder ball defects climb on an electronics line, the first suspect is paste viscosity or reflow profile. Those matter. Often the stencil is the patient: aperture walls polished round, nano-coating worn through, underside paste skinning between prints, or support pins that bow the panel so the squeegee sees a different gap on the edges.
Selective soldering and robotic wire-harness cells own different failure modes. This brief owns volume paste print—stencil, printer, and SPI as one consumable chain.
What the aperture is doing
Paste transfer is geometry and release. Area ratio and aspect ratio gate whether paste fills and releases from small apertures. As walls erode or coat fails, volume drifts low on fine pitches and high on neighbors—SPI may still pass if limits are wide. Reflow is where the debt comes due: insufficient paste, tombstone, bridge, or void under a BGA pad.
Underside wipe frequency, vacuum, and separation speed are part of the recipe. Skipping wipes to “save takt” is a process change.
Numbers that belong on the line report
Track: prints since stencil change or recoat, SPI volume CpK by aperture class, underside wipe interval, and support pin map per assembly. A defect map that follows stencil serial or printer head—not paste lot—is a stencil problem.
Change stencil on print count or SPI drift, not on first bridge at reflow.
Change control
Paste alloy, stencil thickness, aperture modifiers, and nano-coating vendor are qualified together. Dual-sourcing paste without SPI requalification is a MoC item. So is changing squeegee pressure to chase volume on a worn stencil—you buy cosmetic SPI and latent reflow fails.
Before a reflow DOE for insufficient solder, ask stencil hours, last recoat, and whether edge pads are low on SPI volume. The pad sees what the aperture released, not the paste tote label.